EDN

Dynamic vector threading for vRAN, massive MIMO in 5G

Now that we’re getting comfortable with 5G, network operators are already planning for 5G-Advanced, release 18 of the 3GPP standard. The capabilities enabled by this new release—extended reality, ...
Design-Reuse

Dynamic Vector Threading for High Efficiency in Fixed Wireless Access, vRAN & Massive MIMO Beamforming

Now that we're getting comfortable with 5G, network operators are already planning for 5G-Advanced, release 18 of the 3GPP standard. The capabilities enabled by this new release – extended reality, ...
Nasdaq

CEVA Unveils World's Most Powerful DSP Architecture

- Gen4 CEVA-XC architecture offers highest performance of 1,600 GOPS, innovative dynamic multithreading and advanced pipeline to reach operating speeds of 1.8GHz at 7nm - CEVA-XC16, first processor ...
Electronic Design

DSP Architecture Targets 5G Endpoints and Radio Access Networks

This article appeared in Microwaves & RF and has been published here with permission. CEVA’s new Gen4 CEVA-XC DSP architecture unifies the principles of scalar and vector processing in a powerful ...
EDN

Multithreading spin offered for VLIW processors

BANGALORE, India — Researchers are pursuing a twist on very-long-instruction-word (VLIW) processors that exploits standard architectures, compilers and hardware to provide multithreading support. The ...