Design-Reuse

Axi master verilog IP Listing

The Digital Blocks DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI) bus transfers to the standard SPI Master/Slave .
Design-Reuse

Synopsys' New Designware Bridge IP for PCI Express to AMBA 3 AXI Connects Two High-Performance Domains

MOUNTAIN VIEW, Calif., June 7, 2006 - Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced the availability of the DesignWare® Bridge Intellectual Property ...
EDN

ARM launches AMBA AXI coherent extensions

The best index to the evolution of the ARM architectureis, perhaps, the AMBA bus. In the beginning there was a simple microprocessorbus, perfect for connecting a discrete MCU to memory. Then ARM ...
EDN

Synopsys announces SystemVerilog testbench

At the SNUG (Synopsys Users Group) East meeting this week in Boston, Synopsys will release Pioneer-NTB, its new automatic testbench-verification system supporting the SystemVerilog design and ...